• Marie BADAROUX
    Fast and accurate simulation of multi/many-core SoCs
    Communication, multiprocessor, cache, network, simulation
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  • Nathan BAIN
    Methods for the learning and adapting formal neural networks to the constraints of hardware accelerators for applications optimized in power and / or throughput.
    Low power, Deep learning, IA accelerator
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  • Jean BRUANT
    Abstracting FPGA Development Flow Towards Agile Development Flows and High-Level Programming Paradigms
    Hardware Generation, Hardware construction languages, Hardware development, Chisel
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  • Benjamin CATHELINEAU
    Test and reliability analysis for cyber-physical system models
    Modeling, Reliability, Cyber-physical systems, Simulation
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  • Maxime CHRIST
    Learning in very low precision
    Computer Arithmetic, Deep Learning, Digital Circuits and Systems
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  • Chandana DESHPANDE
    Building an Efficient 128-bit General Purpose Processor
    Microarchitecture, RISC-V, Power (energy) efficiency
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  • Eduardo TOMASI RIBEIRO
    Single address space for massively parallel computers
    Virtual, address, parallel, computers,
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