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Fast and accurate simulation of multi/many-core SoCsCommunication, multiprocessor, cache, network, simulation -
Methods for the learning and adapting formal neural networks to the constraints of hardware accelerators for applications optimized in power and / or throughput.Low power, Deep learning, IA accelerator -
Study of an architectural model for code generation taking into account the real time constraints of an embedded system in the electrical measure and protection domainEmbedded, Real time, Code Generation
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Abstracting FPGA Development Flow Towards Agile Development Flows and High-Level Programming ParadigmsHardware Generation, Hardware construction languages, Hardware development, Chisel
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Learning in very low precisionComputer Arithmetic, Deep Learning, Digital Circuits and Systems
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Building an Efficient 128-bit General Purpose ProcessorMicroarchitecture, RISC-V, Power (energy) efficiency -
Single address space for massively parallel computersVirtual, address, parallel, computers,
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Integration of a Manycore Accelerator in a High-Performance ProcessorHPC, MPPA, cache coherency
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