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Improving the performance of in-order processors under hardware complexity constraints


Keywords: Processors, in-order, hardware complexity

Abstract: This thesis proposes to start from a low-power general-purpose processor, the CVA6, and to develop and/or adapt hardware techniques generally dedicated to high-performance machines in order to increase their performance while limiting the increase in power consumption and surface area occupied. The objective is to approach the performance of general-purpose processors designed for high performance, which use mechanisms that are costly in terms of consumption and energy.


Thesis director: Frédéric PÉTROT (TIMA - SLS)
Thesis started on: Aug. 2022
Doctoral school: MSTII

Submitted on June 16, 2023

Updated on December 12, 2023