Memory Design and Test (CMOS, Spintronic and Memristive technologies), Design for HW trust, Reliability, Variability-aware design and test, Neuromorphic Computing, In-memory Computing
Elena-Ioana Vatajelu is full-time researcher with CNRS on the design, test and reliability of Integrated Circuits. She obtained her PhD from Polytechnic University of Catalunya Spain in 2011. She has published 60+ journal and conference papers in the area of dependable memories. Her expertise is on the reliability and the robustness assessment, design-for-reliability, test strategies and security primitives for CMOS and beyond CMOS RAMs in traditional and non-Von Neumann computing paradigms.
She served as program chair of the IEEE European Test Symposium (ETS) 2021, and of IEEE Conference on Design & Technology of Integrated Systems (DTIS) 2019. From 2012 to 2015 she served as Topic Chair of the IEEE/ACM DATE conference, in 2019, 2020 and 2022 she served as Topic Chair of the IEEE ETS, from 2017 she serves in the Executive Committee of the IEEE/ACM DATE conference. During the last 10 years she served as program committee member of various international conferences and symposia, as well as reviewer for various international journals. She is currently member of the CEDA IEEE Executive Committee, she is General Chair of the Test Technology Educational Program (TTEP) of TTTC and, at national level, she is member of the board for GDR BioComp and thematic vice-chair for GDR SOC2. At local level, she is responsable for the microelectronics chapter of FMNT and in charge of gender equality within TIMA laboratory.