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Azzadine THAJTE

Built-in Asynchronous Detection for Hardware Cryptography (BAD4HaCr)

Asynchronous security primitives, Asynchronous circuit, Cryptography, TRNG, PUF, Side-channel attack

The objectives of the PhD is to develop an original monitoring strategy applicable to asynchronous security primitives and potentially to extend it to any asynchronous circuit. In order to develop a viable method, the approach will be first evaluated on a TRNG or a PUF, which are small security primitives. Indeed, the design of asynchronous TRNGs and PUFs have a small footprint, a low latency and a high throughput. The TRNGs and PUFs exploit asynchronous structures, which are particularly interesting for monitoring their activity thanks to their intrinsic asynchronous logic properties. Thus, the properties of randomness, uniqueness, stability and non 'manipulability' can be monitored (completely or partially) in a relatively efficient way. For example, it is possible to correlate the entropy of noise sources to the operation of asynchronous oscillators (Self-Timed Rings) but also to observe the effect of an attack on the operation of the logic itself. Thus, in addition to the traditional measures against side-channel attacks and the difficulty to synchronize on an asynchronous circuit, the operation of this logic allows to go further in the observability and the monitoring of TRNG or PUF primitives.


Thesis director: Laurent FESQUET
Thesis co-director : Giorgio DI NATALE
Thesis started on: September 2023
Doctoral school: EEATS

Submitted on September 18, 2023

Updated on September 18, 2023