Malak BOUAAMRI

Energy-saving constraints are driving analog/RF designs towards the moderate and weak inversion regimes, which offer a better trade-off between performance and energy consumption compared to traditional strong-inversion designs. This shift is also made possible by advanced nanometric technologies with high ( f_t ), enabling RF operation without the need to bias transistors in strong inversion. However, design methodologies in these regions heavily rely on long simulation-based optimization loops, as analytically describing transistor behavior in these regions becomes complex.
In this thesis, we aim to tackle this challenge by exploring the application of a transistor model tailored for simplified design in the context of ultra-low voltage (( V_{DD}/3 )) operation for an ultra-low-power RF system. Fundamental challenges need to be addressed because ( V_{DD}/3 ) lies near the threshold voltage region, where properly utilizing transistor body biasing should allow the threshold voltage to be lowered for proper operation.
The **Advanced Compact MOSFET (ACM)** model is a physical charge-based model of inversion. Unlike complex compact models, the ACM model is design-oriented, aiming to describe transistor behavior using simple equations with a reduced number of parameters while achieving sufficient accuracy to analytically size circuits to meet design objectives. Its approach aligns with that of the EKV model, as both are physical charge-based models of inversion, presenting ( g_m/I_d ) as a central metric. The main difference between the two models lies in the definition of the normalization charge and pinch-off voltage. This model is highly suitable for investigating RF circuit design techniques operating at ( V_{DD}/3 ).
We will focus on key building blocks for an IoT solution on the receive path, such as **LNAs (Low-Noise Amplifiers)**, **mixers**, **VGAs (Variable Gain Amplifiers)**, and **filters**. The **P18 technology** will be used for this study, and specifications such as **NB-IoT** will be aligned.
In terms of circuit design solutions, we will particularly investigate the **N-Path filter technique**.
N-Path filters are a type of RF filter design technique that uses a unique approach to achieve high performance in terms of selectivity, linearity, and energy efficiency. These filters are commonly used in RF and wireless communication systems for applications such as frequency selection, channelization, and signal processing. N-Path filters operate by using multiple paths (N-paths) that introduce controlled delays and phase shifts to the input signal. By carefully adjusting the timing and phase relationships within the filter, specific frequency components can be selectively transmitted or rejected.
Implementing this type of solution in **FD-SOI technology** is particularly promising due to the high energy efficiency of the technology and its flexibility enabled by body-biasing. The **P18 technology** from STMicroelectronics (18nm FD-SOI CMOS) will be utilized for integrating multiple circuits during this thesis. This is the flagship technology currently used by ST for integrating its microcontroller products, and its RF IoT connectivity solutions will benefit from the studies conducted in this thesis.