Print Share Share on Facebook Share on X Share on LinkedIn Share this page URL DUBOIS Jules To be defined Keywords: to be defined Read more ISAAC--CHASSANDE Valentin Design of a Memory System for Sparse Data Processing Keywords: Scientific computing, Sparse data, Memory system Read more MC GOVERN Kilian Hardware Accelerator for Data Choregraphy Efficiency Keywords: Computer architecture, Hardware design, Hardware Acceleration Read more MEEBED Abdallah Efficient hardware implementations of neural networks with intra-layer heteroge- neous quantization Keywords: Number representation, Quantization, Neural networks, Hardware acceleration Read more MILLION Davy Open Source Heterogeneous Multi-Core Chiplet Architecture Exploration Keywords: Heterogeneous Architecture, Multi-Core, Chiplet, Architecture Exploration, Open Source Hardware, RISC-V Read more PHAM Van Quan Digital hardware implementation of large neural networks under resource and memoory bandwidth constraints using network folding Keywords: Digital hardware implementation, large neural networks, network folding Read more RAVENEL Pierre Improving the performance of in-order processors under hardware complexity constraints Keywords: Processors, in-order, hardware complexity Read more ROMANE Olivier Data compression for high-performance hardware acceleration circuits Keywords: neural networks, data compression, hardware acceleration Read more SÖDERSTRÖM Johan Accelerating Hardware Coherence Using Programmer Input in Multi/Manycore Systems Keywords: RISC-V, cache coherence, manycore Read more TOMASI RIBEIRO Eduardo Single address space for massively parallel computers Keywords: Virtual, address, parallel, computers Read more YERLY Louka PhD in Computer Architecture (HW/SW interaction between operating system and microarchitecture) Keywords: Computer Architecture, Microarchitecture, Operating System, HW/SW Read more Print Share Share on Facebook Share on X Share on LinkedIn Share this page URL
ISAAC--CHASSANDE Valentin Design of a Memory System for Sparse Data Processing Keywords: Scientific computing, Sparse data, Memory system Read more
MC GOVERN Kilian Hardware Accelerator for Data Choregraphy Efficiency Keywords: Computer architecture, Hardware design, Hardware Acceleration Read more
MEEBED Abdallah Efficient hardware implementations of neural networks with intra-layer heteroge- neous quantization Keywords: Number representation, Quantization, Neural networks, Hardware acceleration Read more
MILLION Davy Open Source Heterogeneous Multi-Core Chiplet Architecture Exploration Keywords: Heterogeneous Architecture, Multi-Core, Chiplet, Architecture Exploration, Open Source Hardware, RISC-V Read more
PHAM Van Quan Digital hardware implementation of large neural networks under resource and memoory bandwidth constraints using network folding Keywords: Digital hardware implementation, large neural networks, network folding Read more
RAVENEL Pierre Improving the performance of in-order processors under hardware complexity constraints Keywords: Processors, in-order, hardware complexity Read more
ROMANE Olivier Data compression for high-performance hardware acceleration circuits Keywords: neural networks, data compression, hardware acceleration Read more
SÖDERSTRÖM Johan Accelerating Hardware Coherence Using Programmer Input in Multi/Manycore Systems Keywords: RISC-V, cache coherence, manycore Read more
TOMASI RIBEIRO Eduardo Single address space for massively parallel computers Keywords: Virtual, address, parallel, computers Read more
YERLY Louka PhD in Computer Architecture (HW/SW interaction between operating system and microarchitecture) Keywords: Computer Architecture, Microarchitecture, Operating System, HW/SW Read more