DA SILVA Jose Eduardo

Abstract: The operating frequencies of CMOS ICs are becoming increasingly fast, with applications planned at 110GHz for radar. These frequencies can be achieved by miniaturization of components and optimization of substrates, as in the case of the UTBB 28 nm FD-SOI CMOS. On the other hand, these technologies are increasingly sensitive to interference phenomena such as electrostatic discharge (ESD). In order to avoid premature failures and to ensure a high level of reliability during mass production, it is essential to add specific protections. At high frequencies, the parasitic capacitance associated with these protections becomes an important parameter influencing the transmission quality of radio frequency (RF) signals. In this context, this thesis aims at studying several fronts of understanding in the ESD domain but also in the RF domain, dedicated to the study and design of new ESD protections with very low capacitance and very low leakage current.