Davy MILLION

Abstract: Currently, we see two major trends in the world of hardware design community. First, the emergence of a dynamic Open Source community and the number of available processors and peripherals is growing rapidly. The RISC-V processor (and the 64-bit CVA6 implementation) are now very mature. The OpenPiton project makes it possible to assemble a large number of RISC-V cores to build a multi-core system with memory coherency. There are emerging implementations of RISC-V, such as AnyCore, that offer much higher performance due to their super-scalar architecture.
The second major trend is the wider deployment of 2.5D and 3D integration technologies. To a large extent, the digital IPs needed to assemble a multi-core computer partitioned into chiplets already exist as Open Source, with variable levels of maturity. These building blocks, were not initially designed for 2.5D/3D integration and this raises many important architectural questions.
The focus of this thesis is to study architectures for chiplet-based compute systems with heterogeneous processors. The candidate will start from the existing Open Source IPs (CVA6, AnyCore, OpenPiton, AIB,..) and will propose new, parameterized architectures that can be partitioned into chiplets. The person will carefully study the memory hierarchy and the NoC topology. They will produce an RTL prototype of this system, compile it onto a hardware emulation platform, boot a Linux and evaluate the performance with appropriate benchmarks. This study will include an architecture exploration on the impact of how the different parameters impact performance metrics (power, compute, etc.). The research in this thesis is focused on computer architecture and the code that will be developed will be submitted back as Open Source.