PhD Students - MADMAX | TIMA - Université Grenoble Alpes

DUBOIS Jules

Combined Software and Hardware Approaches for Large Scale Sparse Matrix Acceleration

Keywords: Hpc, Sparse data, heterogenous architecture

CHIPCO : CHIPlet-aware cache Coherency

Keywords: cache coherence, communication protocol, quality of service, chiplet

Design of a Memory System for Sparse Data Processing

Keywords: Scientific computing, Sparse data, Memory system

Hardware Accelerator for Data Choregraphy Efficiency

Keywords: Computer architecture, Hardware design, Hardware Acceleration

Efficient hardware implementations of neural networks with intra-layer heteroge- neous quantization

Keywords: Number representation, Quantization, Neural networks, Hardware acceleration

Open Source Heterogeneous Multi-Core Chiplet Architecture Exploration

Keywords: Heterogeneous Architecture, Multi-Core, Chiplet, Architecture Exploration, Open Source Hardware, RISC-V

Digital hardware implementation of large neural networks under resource and memoory bandwidth constraints using network folding

Keywords: Digital hardware implementation, large neural networks, network folding

Data compression for high-performance hardware acceleration circuits

Keywords: neural networks, data compression, hardware acceleration

Distributed address translation mechanisms integrated into the network-on-chip for RISC-V processors

Keywords: RISC-V, IOMMU, MMU, NOC, TLB,

Accelerating Hardware Coherence Using Programmer Input in Multi/Manycore Systems

Keywords: RISC-V, cache coherence, manycore

PhD in Computer Architecture (HW/SW interaction between operating system and microarchitecture)

Keywords: Computer Architecture, Microarchitecture, Operating System, HW/SW