Joint IEEE & SoC2 Day On Inversion Coefficient and its Applications

Program: 2023_04_03_ieee_soc2_day.pdf

Context:
With the development of advanced technologies, the complexity of electrical models of MOS transistors has increased significantly.
Indeed, the reduction of the channel length generates effects that cannot be neglected anymore.
Short channel effects such as channel length modulation, mobility reduction or DIBLE are predominant in advanced technologies and make the classical region-based model obsolete.
This is a main issue for the development of design methods.
Today, circuit pre-sizing using simple models has become very inaccurate and designers rely on intensive simulations to design their circuits in the early stages of design.
Beyond a reduction in design efficiency, designers lose the link with the physical phenomena that govern the transistor.
This is why the development of design-oriented models, allowing an accurate analytical pre-sizing, is very important and constitutes a fertile field of investigation.
Normalized inversion charge based models are good candidates because they can be implemented with a very small number of parameters.
The EKV and ACM models are the most famous ones.
Based on these models, many design methods have been developed since the 90s like gm /ID or IC based approaches.
Initially dedicated to low frequency domain, these approaches are now gaining radio frequencies.
The models have been refined to take into account the short channel effects and allow today to design circuits in a quasi-analytical way while taking into account effects such as non-linearity or frequency limitations.
In addition, recent works report their use for cryogenic applications since the small number of parameters facilitate model extraction.
The purpose of this workshop is to review recent advances in the field of design-oriented modelling and design methods using these models.