Maplurinum (Machinæ pluribus unum)

Description

Cloud and high-Performance architectures are increasingly heteregenous and incorporate often specialized hardware. We have first seen the generalization of GPUs in the most powerful machines, followed a few years later by the introduction of FPGAs. More recently we have seen nascence of many other accelerators such as tensor processor units (TPUs) for DNNs or variable precision FPUs. Recent hardware manufacturing trends make it very likely that specialization will not only persist, but increase in future supercomputers. Because manually managing this heterogeneity in each application is complex and not maintainable, we propose in this project to revisit how we design both hardware and operating systems in order to better hide the heterogeneity to supercomputer users.

In summary, we propose to rethink the hardware/software boundary in order to hide the heterogeneity behind a common minimal instruction set and a unified address space.

Partners

• The Parallel & Distributed Systems group of Telecom Sud Paris.
• The System-Level Synthesis group of TIMA, a joint lab. between INPG/UGA/CNRS.
• The Laboratory of Systems-on-Chip and Advanced Technologies (LSTA) from CEA LIST/DSCIN.
• The PACAP team of INRIA Rennes Bretagne Atlantique.