Skip to main content


An asynchronous Design Flow for Event-Based Processing in FDSOI Technologies

Non-uniform sampling, CAD automation, FDSOI, Asynchronous Design

In the framework of the OCEAN12 project, this PhD work on an automated asynchronous design flow for low-power applications able to take into account the FDSOI biasing characteristics and the event-based processing approach. Indeed, most of the digital circuits are synchronous leading to extra dynamic power consumption. This is currently mitigated by techniques such as clock-gating, DVFS (Dynamic Voltage and Frequency Scaling) and, now with body biasing in FDSOI. To go further in reducing power, asynchronous logic performing a fine-grain body biasing is an interesting approach. A first step has already been done in this direction thanks to a previous project. Nevertheless, implementing an asynchronous circuit with fine-grain body-biasing techniques is not an easy task and requires dedicated strategies and heuristics. In order to automate a such flow, the design has to be modeled, verified and synthesized in a general framework integrating the event-based approach and the FDSOI features.


Thesis director: Laurent FESQUET
Thesis supervisor: Katell MORIN-ALLORY
Thesis started on: Oct. 2018
Thesis defence: 23/09/2022
Doctoral school: EEATS

Submitted on January 12, 2022

Updated on June 20, 2022