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On-chip generation of high-frequency sinusoidal signals using harmonic cancellation techniques


Keywords: Analogue circuits, Test signal generation, Harmonic cancellation

Abstract: This thesis is aimed at built-in test solutions for state-of-the-art high-speed circuitry, including Analog-to-Digital converters (ADCs), wide-band radios, phased arrays, etc. Built-in test consists of migrating some of the test instruments into the IC, in order to facilitate and speed-up testing. For example, built-in test could consist of generating test stimuli on-chip, performing and processing measurements on-chip, etc. Built-in test can also help to diagnose the source of failure and, thereby, enhance production yield through appropriate actions. Furthermore, it enables on-line test of the IC to monitor its health in safety-critical and mission-critical applications.


Thesis director: Manuel BARRAGAN (TIMA - RMS)
Thesis supervisor: Salvador MIR (TIMA - RMS)
Thesis started on: Jan. 2020
Thesis defence: March 22, 2024
Doctoral school: EEATS

Submitted on January 12, 2022

Updated on April 8, 2024