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Development of an advanced flow of structural, formal and semi-formal verification of asynchronous paths using appropriate formal verification methods and tools, for high-performance integrated processor-based subsystems

CDC, RDC, formel, Verification

Develop new verification concepts for asynchronous paths and optimized verification flows that guarantee a maximum coverage.


Thesis director: Katell MORIN-ALLORY
Thesis supervisor:  Jean-Christophe BRIGNONE (STMicroelectronics)
Thesis started on: May 2021
Doctoral school: EEATS

Submitted on January 12, 2022

Updated on March 17, 2022