Laboratoire TIMA


MIAI GRENOBLE ALPES - TIMA a obtenu deux chaires MIAI et encadrera des thèses


(Multidisciplinary Institute in Artificial Intelligence)

Chair title: Digital Hardware AI Architectures
Chair holder(s): Frédéric PETROT (TIMA - SLS team)
Financed by: ANR - PIA
In short:
According to a recent Facebook analysis, AI tasks need a 100x power reduction in the coming years to be sustainable. This chair focuses on highly energy efficient hardware/software architectures integration of AI and deep-learning to take up this challenge.
• Google France
• Kalray
• STMicroelectronics
• Upmem

Chair title: Hardware for spike-coded neural networks exploiting hybrid CMOS non-volatile technologies
Chair holder(s): Lorena ANGHEL (TIMA - AMfoRS team)
Financed by: ANR - PIA
In short:
Spiking Neural Networks are seen as a Key building block for strongly improving the energy efficiency of current AI applications and opening up new possibilities (in terms of unsupervised learning, recurrent networks, probabilistic inference, etc.). In that respect, the Grenoble R&D ecosystem has key strengths, especially its capability to design and manufacture embedded systems in advanced hybrid CMOS-Non Volatile Memory (NVM) technology. The scientific challenges to be tackled are the following. The first one is to define power-constrained learning and inference algorithms (online, supervised, unsupervised, probabilistic, etc.). The second one is to design a scalable and flexible SNN architecture, adaptable to the different above-mentioned algorithms, and fabricate that circuit in hybrid nanoscale CMOS and NVM technology, enabling very dense synaptic density. The last objective is to derive a principled toolchain for the algorithm, design, development, and integration of spiking neural networks for future adoption in industrial health and automotive embedded applications.

Le prochain Conseil Scientifique aura lieu le

24/01/2020 - de 09 h 00 à 11 h 30, Laboratoire TIMA - Salle T312, FRANCE


Design, Automation & Test in Europe

Venue: Grenoble, FRANCE
Date: March 9-13, 2020

general chair : DI NATALE Giorgio local organization : ANGHEL L. publication chair : VATAJELU E.I. University Booth Co-Chair : PETROT F.

21st International Symposium on Quality Electronic Design

Venue: Santa Clara, USA
Date: March 25-26, 2020

track chair : RUFER L.

Summary: The 21st International Symposium on Quality Electronic Design (ISQED 2020) is the premier interdisciplinary and multidisciplinary Electronic Design conference—bridges the gap among Electronic/Semiconductor ecosystem members providing electronic design tools, integrated circuit technologies, semiconductor technology,packaging, assembly & test to achieve total design quality. Current and all past ISQED events have been held with the technical sponsorship of IEEE CASS, IEEE EDS, and IEEE Reliability Society. All past Conference proceedings & Papers have been published in IEEE Xplore digital library and indexed by Scopus.

21st IEEE Latin-American Test Symposium

Venue: Jatiúca (Maceió), BRAZIL
Date: March 30-April 2, 2020

steering committee member : VELAZCO R. technical program committee : LEVEUGLE R., MIR S., POSSAMAI BASTOS R., SIMEU E., VELAZCO R.

15th International Conference on Design & Technology of Integrated Systems in Nanoscale Era

Venue: Marrakesh, MOROCCO
Date: April 1-3, 2020

technical program committee : BENABDENBI M., VATAJELU E.I. track chair : VATAJELU E.I.

Thèses soutenances

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Winner of PhD Forum at VLSI-SoC'2019

Distinction : Winner of PhD Forum at VLSI-SoC'2019 (27th IFIP/IEEE International Conference on Very Large Scale Integration)
Date: October 6-9, 2019
Place: Cuzco (PERU)
Title: A Digital Event-Based Strategy for ASK demodulation
- Rodrigo IGA JADUE (TIMA - CDSI team)
- Sylvain ENGELS (TIMA - CDSI team)
- Laurent FESQUET (TIMA - CDSI team)


Best paper Award at RECOSOC'2018 (Lille, FRANCE)

Distinction : Best paper Award at RECOSOC'2018 (13th International Symposium on Reconfigurable Communication-centric Systems-on-Chip)
Date : July 9-11, 2018
Place : Lille (FRANCE)
Title : An FPGA target for the StarPU heterogeneous runtime system
(pp. 1-8 / DOI: 10.1109/ReCoSoC.2018.8449373)
Authors :
- Manuel SELVA (TIMA, SLS team)
- François BROQUEDIS (LIG)
- Frédéric DESPREZ (INRIA)
- Olivier MULLER (TIMA, SLS team)


Best Paper Award at DDECS'2019 (Cluj Napoca, ROMANIA)

Distinction : Best Paper Award at DDECS'2019 (22nd International Symposium on Design and Diagnostics of Electronics Circuits and Systems)
Date : April 24-26, 2019
Place : Cluj Napoca (ROMANIA)
Title : "Encryption-Based Secure JTAG"
Authors :
- Emanuele VALEA (LIRMM, Montpellier)
- Mathieu DA SILVA (LIRMM, Montpellier)
- Marie-Lise FLOTTES (LIRMM, Montpellier)
- Giorgio DI NATALE (TIMA, AMfoRS team, Grenoble)
- Bruno ROUZEYRE (LIRMM, Montpellier)



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