Laboratoire TIMA

Actualités


MIAI GRENOBLE ALPES - TIMA a obtenu deux chaires MIAI et encadrera des thèses

, FRANCE

TIMA MIAI CHAIRS
(Multidisciplinary Institute in Artificial Intelligence)

Chair title: Digital Hardware AI Architectures
Chair holder(s): Frédéric PETROT (TIMA - SLS team)
Financed by: ANR - PIA
In short:
According to a recent Facebook analysis, AI tasks need a 100x power reduction in the coming years to be sustainable. This chair focuses on highly energy efficient hardware/software architectures integration of AI and deep-learning to take up this challenge.
Partners:
• Google France
• Kalray
• STMicroelectronics
• Upmem
___________________________________________________________________

Chair title: Hardware for spike-coded neural networks exploiting hybrid CMOS non-volatile technologies
Chair holder(s): Lorena ANGHEL (TIMA - AMfoRS team)
Financed by: ANR - PIA
In short:
Spiking Neural Networks are seen as a Key building block for strongly improving the energy efficiency of current AI applications and opening up new possibilities (in terms of unsupervised learning, recurrent networks, probabilistic inference, etc.). In that respect, the Grenoble R&D ecosystem has key strengths, especially its capability to design and manufacture embedded systems in advanced hybrid CMOS-Non Volatile Memory (NVM) technology. The scientific challenges to be tackled are the following. The first one is to define power-constrained learning and inference algorithms (online, supervised, unsupervised, probabilistic, etc.). The second one is to design a scalable and flexible SNN architecture, adaptable to the different above-mentioned algorithms, and fabricate that circuit in hybrid nanoscale CMOS and NVM technology, enabling very dense synaptic density. The last objective is to derive a principled toolchain for the algorithm, design, development, and integration of spiking neural networks for future adoption in industrial health and automotive embedded applications.
Partners:
• CEA LETI (Alexandre VALERIAN)


Conférences

6th International Conference on Event-Based Control, Communication, and Signal Processing

EBCCSP
Venue: Grenoble, FRANCE
Date: June 3-5, 2020

finance chair : FOURNERET-ITIÉ A.-L. general chair : FESQUET L.

Summary: The aim of the EBCCSP conference series is to provide a platform for the research communities that work in diverse application areas of the event-based paradigm to exchange new research results and ideas to explore synergies and foster scientific advancement.

18th IEEE International NEWCAS Conference

NEWCAS
Venue: Montréal, CANADA
Date: June 16-19, 2020

program chair : BARRAGAN M.

Summary: The 18th IEEE International NEWCAS Conference will be held on June 16 – 19, 2020. The program of the conference will be tailored to reflect the wide spectrum of topics and research interest shared among the organizing entities. This collaboration will be oriented towards advanced research in adaptive systems which constitutes the highlights of the NEWCAS conference, but also areas related to analog and digital signal processing, low power consumption, circuits and systems designs.

14ème Colloque National du GDR SOC2

GDR SOC 2
Venue: Rennes, FRANCE
Date: June 23-25, 2020

general chair : ANGHEL L.

8th Prague Embedded Systems Workshop

PESW
Venue: Roztoky u Prahy, CZECH REP.
Date: June 25-27, 2020

technical program committee : DI NATALE Giorgio, VATAJELU E.I.

Thèses soutenances

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Distinctions


Winner of PhD Forum at VLSI-SoC'2019 (Cuzco, PERU)

Distinction : Winner of PhD Forum at VLSI-SoC'2019 (27th IFIP/IEEE International Conference on Very Large Scale Integration)
Date: October 6-9, 2019
Place: Cuzco (PERU)
Title: A Digital Event-Based Strategy for ASK demodulation
Authors:
- Rodrigo IGA JADUE (TIMA - CDSI team)
- Sylvain ENGELS (TIMA - CDSI team)
- Laurent FESQUET (TIMA - CDSI team)

 

Best Paper Award at DDECS'2019 (Cluj Napoca, ROMANIA)

Distinction : Best Paper Award at DDECS'2019 (22nd International Symposium on Design and Diagnostics of Electronics Circuits and Systems)
Date : April 24-26, 2019
Place : Cluj Napoca (ROMANIA)
Title : "Encryption-Based Secure JTAG"
Authors :
- Emanuele VALEA (LIRMM, Montpellier)
- Mathieu DA SILVA (LIRMM, Montpellier)
- Marie-Lise FLOTTES (LIRMM, Montpellier)
- Giorgio DI NATALE (TIMA, AMfoRS team, Grenoble)
- Bruno ROUZEYRE (LIRMM, Montpellier)

 

IFIP WG 10.5 Meritorious Service Award at VLSI-SoC'2018 (Verona, ITALY)

Distinction : The IFIP WG 10.5 Meritorious Service Award has been given to Mrs Dominique BORRIONE "for continued services to IFIP ans the Working Group on Design and Engineering of Electronic Systems"
She was awarded during VLSI-SoC'2018 (26th IFIP/IEEE International Conference on Very Large Scale Integration)
Date: October 8-10, 2018
Place: Verona (ITALY)

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Jobs

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