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Automatic Generation of Embedded Memory Wrapper for Multiprocessor Soc

Auteur(s) : S. Meftali, A. A. Jerraya, F. Gharsalli, F. Rousseau

ISRN: TIMA-RR--02/03-2--FR

Embedded memory plays a critical role to improve performances of systems-on-chip (SoC). In this paper, we present a new methodology for embedded memory design in the case of application specific multiprocessor system on-chip. This approach facilitates the integration of standard memory components. The concept of memory wrapper allows automatic adaptation of physical memory interfaces to a communication network that may have a different number of access ports. We give also a generic architecture to generate this memory wrapper.This approach has been applied successfully on an image processing application.