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On-chip testing of embedded silicon transducers

Auteur(s) : B. Charlot, B. Courtois, S. Mir, L. Rufer

ISRN: TIMA-RR--04/07-02--FR

System-on-Chip (SoC) technologies are evolving towards the integration of highly heterogeneous devices, including hardware of a different nature, such as digital, analog and mixedsignal, together with software components. Embedding transducers, predicted by technology roadmaps, is yet another step in this continuous search for higher levels of integration and miniaturisation. Embedded transducers fabricated with silicon/CMOS compatible technologies may have more limitations than Fig. 1 shows a general microsystem architecture including,transducers fabricated with fully dedicated technologies. However,they offer Industry the possibility of providing low cost applications these transducers is often formed as a matrix of sensible or for very large market niches, while still keeping acceptable transducer sensitivity. This is the case, for example, for accelerometers, micro-mirrors display devices or CMOS imagers. Embedded transducers are analog components. But given the fact that they work with signals other than electrical, the test of these microprocessor with the associated memory. External physical embedded parts poses new challenges. Test technology for SoC devices is rapidly maturing but many difficulties still remain, in particular for addressing the test of analog and mixed-signal parts. In this paper, we will present our work in the field of MEMS (Micro-Electro-Mechanical Systems) on-chip testing with a brief overview of the state-of-the-art.