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Automatic code-transformation and architecture refinement for application-specific multiprocessor SoCs with shared memory

Auteur(s) : S. Meftali, F. Gharsalli, F. Rousseau, A. A. Jerraya

Doc. Source: SOC Design Methodologies IFIP TC10 / WG10.5 Eleventh International Conference on Very Large Scale Integration of Systems-on-Chip (VLSI-SOC’01) December 3–5, 2001, Montpellier, France

Publisher : Springer

Pages : 193-204

Memory represents a major bottleneck in embedded systems. Multimedia applications bulky in data in these embedded systems require shared memory. But the integration of this kind of memory implies some architectural modifications and code transformations. And no automatic tool exists allowing designers to integrate shared memory in the SoC design flow. In this work, we present a systematic approach for the design of shared memory architectures for application-specific multiprocessor systems-on-chip. This work focuses on the code-transformations related to the integration of a shared memory.