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Practical Simulation Flow for Evaluating Analog and Mixed-Signal Test Techniques

Auteur(s) : M. Barragan, H. Stratigopoulos, S. Mir, H. Le Gall, N. Bhargava, A. Bal

Journal : IEEE Design & Test

Volume : 33

Issue : 6

Pages : 46-54

Doi : 10.1109/MDAT.2016.2590985

Alternative test techniques are continuously proposed for analog and mixed-signal circuits with the aim to reduce the standard test cost and complexity. One of the main reasons why the majority of these alternative test solutions have not been met with success is the lack of a proof that they will not sacrifice the accuracy of the standard test, resulting in intolerable test escapes and yield loss. In this paper, we target specifically circuits with long simulation times and we present a practical simulation flow that allows evaluating in a time-efficient manner alternative test solutions during their development phase by estimating the resultant parametric test metrics. The simulation flow can be used to provide feedback for refining an alternative test solution and to give the green light for implementing the alternative test solution in high-volume production. The simulation flow is demonstrated for evaluating a built-in self-test strategy for ΣΔ ADCs.