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On MPSoC Software Execution at the Transaction Level

Auteur(s) : F. Pétrot, M. Gligor, M.M. Hamayun, H. Shen, N. Fournel, P. Gerin

Journal : IEEE Design and Test of Computers

Volume : 28

Issue : 3

Pages : 32-43

Doi : 10.1109/MDT.2010.118

This article presents a wide variety of techniques for realizing transaction-level models of the increasingly large-scale multiprocessor systems on chip. It describes how such models of hardware allow subsequent software integration and system performance evaluation.