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Building an analogue fault simulation tool and its application to MEMS

Auteur(s) : C. Roman, S. Mir, B. Charlot

Journal : Microelectronics journal

Volume : 34

Issue : 10

Pages : 897-906

Doi : 10.1016/S0026-2692(03)00162-9

Microsystems are rapidly evolving from individual transducer components into highly integrated complete systems on the same chip. Conceiving these devices requires significant changes in the design and test flow. Computer-Aided Design (CAD) tools and validation procedures are to be created and prepared to face the new challenge. So far, very little work has been done to ease the burden of testing highly integrated transducers. This paper first looks into the design and test flow for these new systems. Next it presents a tool that is currently being developed in order to make possible the extensive fault simulation of Microsystems, concerning the transducer and the electronic parts as well. A Fault Model Description Language (FMDL) is proposed. The FMDL is expected to deal gracefully with this task, taking into account the specific requirements of non-electronic parts but keeping compatibility with an Integrated Circuit CAD environment.