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Simulink(R) based Heterogeneous Multiprocessor SoC Design Flow for Mixed Hardware/Software refinement and simulation

Auteur(s) : Sang-Il Han, Soo-Ik Chae, L. Brisolara, L. Carro, K. Popovici, X. Guérin, A. A. Jerraya, K. Huang, L. Li, X. Yan

Journal : Integration, the VLSI Journal

Volume : 42

Issue : 2

Pages : 227-245

Doi : 10.1016/j.vlsi.2008.08.003

As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.