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On SPARC LEON-2 ISA Extensions Experiments for MPEG Encoding Acceleration

Auteur(s) : P. Guironnet de Massas, P. Amblard, F. Pétrot

Journal : Journal of VLSI Design

Volume : 2007

Pages : 10 p.

Doi : 10.1155/2007/28686

This paper presents the necessary steps to modify the implementation of the SPARCV8 architecture to enhance it with multimedia-oriented instructions. The purpose is improving video compression performance without designing dedicated coprocessors. We investigate the complexity of modifying a standard processor instruction set and show that, although not trivial, this is feasible in a few weeks. We implemented 12 new instructions and use some of them to optimize the computation of a demanding step of the MPEG encoding. The result is a performance increase of 67% in the execution of a part of this algorithm, allowing us to expect a 30% speedup in the execution of an MPEG video compression. The area increase of the integer unit is about 18% and the clock frequency is not significantly modified in an LEON-2 implementing 6 among 12 of the new instructions.