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A loop-based scheduling algorithm for hardware description languages

Auteur(s) : M. Rahmouni, K. O'Brien, A. A. Jerraya

Journal : Parallel Processing Letters

Volume : 4

Issue : 3

Pages : 351-364

The paper presents dynamic loop scheduling (DLS), a loop-based algorithm that can efficiently schedule large, control-flow dominated designs. It compares favourably with results produced for traditional path-based approaches and at the same time requires much less overhead to implement. The high-performance of DLS is due mainly to the inclusion of loop feedback edges in the control-flow graph and the interruption of the path generation on the fly. The latter eliminates the generation of false paths thereby avoiding the path explosion problem.