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System-on-a-Chip Cosimulation and Compilation

Auteur(s) : F. Nacabal, C. Valderrama, P. Paulin, A. A. Jerraya

Journal : IEEE Design and Test of Computers

Volume : 14

Issue : 2

Pages : 16-25

Doi : 10.1109/54.587736

Complex consumer products with multiple functions on a single chip demand new design and verification methods for interfunctioning hardware and software components. The authors' new techniques address this need.