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Combining architectural simulation and behavioral synthesis

Auteur(s) : A. Jemai, P. Kission, A. A. Jerraya

Journal : IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volume : E80-A

Issue : 10

Pages : 1756-1766

The analysis of an architecture may provide statistic information on the use of the resources and on the execution time. Some of this information requires just a static analysis. Others, such as the execution time, may need dynamic analysis. Moreover, as the computation time of behavioral descriptions (control step time unit) and RTL ones (cycle based) may differ a lot, unexpected architectures may be generated by behavioral synthesis. Therefore, a means to debug the results of behavioral synthesis are required. This paper introduces a new approach to integrate an interactive simulator within a behavioral synthesis tool, thereby allowing concurrent synthesis and simulation. The simulator and the behavioral synthesis are based on the same model. This model allows one to link the behavioral description and the architecture produced by synthesis. This paper also discusses an implementation of this concept resulting in a simulator, called AMIS. This tool assists the designer in understanding the results of behavioral synthesis and for architecture exploration. It may also be used to debug the behavioral specification.