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Hardware/software codesign of on-chip communication architecture for application-specific multiprocessor system-on-chip

Auteur(s) : N.-E. Zergainoh, A. Baghdadi, A. A. Jerraya

Journal : IJES - International Journal of Embedded Systems

Volume : 1/2

Issue : 1

Pages : 112-124

System-on-chip (SoC) is developing as a new paradigm in electronic system design. This allows an entire hardware/software system to be built on a single chip, using predesigned components. This paper examines the achievements and future of novel approach and flow for an efficient design of application-specific multiprocessor system-on-chip (called GAM-SoC). The approach is based on a generic architecture model, which is used as a template throughout the design process. The key characteristics of this model are its great modularity, flexibility and scalability, which make it reusable for a large class of applications. In the flow, architectural parameters are first extracted from a high-level system specification and then used to instantiate architectural components, such as processors, memory modules, IP-hardware blocks and on-chip communication networks. The flow includes the generation of hardware/software wrappers that adapts the processor to the on-chip communication network in an application-specific way. The feasibility and effectiveness of this approach are illustrated by significant demonstration examples.