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Automatic code-transformations and architecture refinement, for application-specific

Auteur(s) : F. Gharsalli, A. A. Jerraya, S. Meftali, F. Rousseau

Doc. Source: IFIP International Conference on Very Large Scale Integration - The Global System on Chip Design & CAD Conference (VLSI-SOC'01)

Publisher : IEEE

Memory represents a major bottleneck in embedded systems. For multimedia applications with a lot of data, these eembedded systems require shared memory. But the integration of this kind of memory implied some architectural modifications and code transformations. And no automatic tool exists allowing designers to integrate shared memory during SoCs design. In this paper, we present a systematic approach for the design of shared memory architectures in the case of application-specific multiprocessor system-on-chip (SoCs) from a high abstraction level. This paper focuses on the code-transformations related to the integration of the shared memory into the SoC.