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Automatic generation of VHDL-C interfaces for distributed cosimulation

Auteur(s) : C. Valderrama, C. Liabeuf, F. Nacabal, P. Paulin, A. A. Jerraya

Doc. Source: SASIMI Workshop

This paper deals with distributed cosimulation for heterogeneous systems prototyping. Our VHDL/C cosimulation environment allows to handle all kinds of distributed architectures, any number of hardware or software modules, cosimulation at different abstraction levels and several cosimulation scenarious. This flexibility is obtained thanks to an automatic cosimulation interface generation tool able to create the link between Hw and Sw simulation environments. The advantages of our cosimulation methodology and more precisely the automatic cosimulation interface generation tool will be described by examples.