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Generic architecture platform for multiprocessor embedded system-on-chip design

Auteur(s) : A. Baghdadi, N.-E. Zergainoh, D. Lyonnard, A. A. Jerraya

Doc. Source: International Workshop on Distributed and Parallel Embedded Systems (DIPES'00)

Publisher : Kluwer Academic Publishers

Pages : 53-64

In this paper, we present a generic architecture model for multiprocessor embedded system-on-chip design. The use of this model as a template in a system design environment allows for efficient generation of multiprocessor architectures. The key characteristics of this model are its great modularity, flexibility and scalability which make it reusable for a large class of application. In addition, it allows for reusability of pre-designed blocks and automatic architecture generation. This paper focuses on the definition of the architecture model. The feasibility and effectiveness of this architecture model are illustrated by a significant demonstration example.