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Mapping an obstacles detection, stereo vision-based, software application on a multi-processor system-on-chip

Auteur(s) : A. Greiner, F. Pétrot, M. Carrier, M. Benabdenbi, R. Chotin-Avot, R. Labayrade

Doc. Source: IEEE Intelligent Vehicles Symposium

Publisher : IEEE

Pages : 370-376

Doi : 10.1109/IVS.2006.1689656

In this paper, we present the implementation of a multi-threaded software application for pre-crash obstacle detection, using stereo vision, and the "V-disparity" algorithm, that requires intensive computation. This application runs on a generic, low cost, massively parallel, multi-processor system-on-chip (MP-SoC). This hardware architecture is suitable for automotive area with respect to performance, cost, and flexibility constraints. This hardware/software embedded application is able to process 40 stereoscopic pairs per second with 256 lines of 512 pixels images and a disparity range of 256. Our architecture is made of 8 clusters, 30 general-purpose 32-bit processors and 750 Kbytes embedded memory.