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Fast timed cosimulation of HW/SW implementation of embedded multiprocessor SoC communication

Auteur(s) : S. Yoo, G. Nicolescu, L. Gauthier, A. A. Jerraya

Doc. Source: Sixth IEEE International High Level Design Validation and Test Workshop (HLDVT'01)

Publisher : IEEE

Pages : 79-82

Doi : 10.1109/HLDVT.2001.972811

To fast evaluate HW/SW implementation of multiprocessor SoC communication, we present a method to simulate operating systems (OSs) on a simulation host without running instruction set simulators and generic OS simulation models. The method enables fast timed OS simulation including the preemption of task execution. Together with the fast simulation of synthesizable HW code (e.g. in synthesizable C), it will enable fast evaluation of HW/SW implementation of multiprocessor SoC communication.