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Generic architecture platform for multiprocessor system-on-chip design

Auteur(s) : A. Baghdadi, N.-E. Zergainoh, D. Lyonnard, A. A. Jerraya

Doc. Source: International Workshop on Distributed and Parallel Embedded Systems (DIPES'00)

Publisher : Kluwer Academic Publishers

Pages : 53-63

We present a generic architecture model for multiprocessor embedded system-on-chip design. The proposed model is modular, flexible and scalable. It permits an efficient generation of multiprocessor architectures for embedded systems on chip. This work forms a promised step towards the definition of an efficient multiprocessor SoC design environment applicable to a large application domain. The key point when defining such an environment is to define the architecture model that will fix the class of architectures handled by the system. The model allows for automatic architecture generation. The chapter focuses on the definition of the architecture model. The feasibility and effectiveness of this architecture model is illustrated by a significant demonstration example