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Colif: A multilevel design representation for application-specific multiprocessor system-on-chip design

Auteur(s) : W. Cesario, G. Nicolescu, L. Gauthier, D. Lyonnard, A. A. Jerraya

Doc. Source: 12th International Workshop on Rapid System Prototyping (RSP'01)

Publisher : IEEE

Pages : 110-115

Doi : 10.1109/IWRSP.2001.933847

Application-specific multiprocessor system-on-chip is required for high-volume future embedded systems. However, obtaining a good application-specific architecture could be an overly complex problem if we consider all the possible customizations. In this paper, we present Colif, a design representation that clearly separates component behavior and communication infrastructure. In addition, it has a flexible communication model that spans multiple abstraction levels. These features are suitable for a design flow where customizing communications and component behaviors at different abstraction levels are the central issue. The paper introduces the main concepts of Colif and compares it to existing system modeling approaches.