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An efficient architecture model for systematic design of application-specific multiprocessor SoC

Auteur(s) : A. Baghdadi, D. Lyonnard, N.-E. Zergainoh, A. A. Jerraya

Doc. Source: Design, Automation and Test in Europe Conference (DATE'01)

Publisher : IEEE

Pages : 55-62

Doi : 10.1109/DATE.2001.915001

In this paper, we present a novel approach for the design of application specific multiprocessor systems-on-chip. Our approach is based on a generic architecture model which is used as a template throughout the design process. The key characteristics of this model are its great modularity, flexibility and scalability which make it reusable for a large class of applications. In addition, it allows to accelerate the design cycle. This paper focuses on the definition of the architecture model and the systematic design flow that can be automated. The feasibility and effectiveness of this approach are illustrated by two significant demonstration examples.