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Automated Non-Regression Testing for Accelerator Prototyping on FPGA

Auteur(s) : A. Wicaksana, A. Prost-Boucle, O. Muller, F. Rousseau

Doc. Source: International symposium on Rapid System Prototyping (RSP'16)

Publisher : IEEE

Pages : 45-51

High-Level Synthesis (HLS) has opened an opportunity for soft- ware programmers to target FPGA more rapidly. When developing HLS tools, tests are desirable to ensure their function, reliability and performance. When modifications are applied to a tool, Non- Regression Test (NRT) asserts that the changes have intended effect while Regression Test (RT) verifies that the tool still performs cor- rectly without unwanted behaviour. The work presented in this paper is focused on a method to auto- matically perform Non-Regression Test in HLS tool developments, although it can also be used as a Regression Testing technique. This method relies on a framework which allows HLS tool developers to verify the circuits generated from the tool directly on FPGA, in- stead of using simulations. The verification flow is automatic, so that knowing the details of the system is unnecessary for developers. The framework has been tested successfully over several applications from HLS benchmark and it gives more promising results than its simulation counterpart.