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Unifying memory and processor wrapper architecture in multiprocessor SoC design

Auteur(s) : F. Gharsalli, D. Lyonnard, F. Rousseau, A. A. Jerraya

Doc. Source: 15th International Symposium on System Synthesis (ISSS'02)

Publisher : ACM, NY, USA

Pages : 26-31

Doi : 10.1109/ISSS.2002.1227147

In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. this approach facilitates the integration of existing components with the concept of wrapper. Wrappers allow automatic adaptation of physical interfaces to a communication network. We also give a generic architecture to produce these wrappers, either for processors or for other specific components such as memory IP. This approach has successfully been applied on a low-level image processing application.