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A system-level overview and comparison of three High-Speed Serial Links: USB 3.0, PCI Express 2.0 and LLI 1.0

Auteur(s) : J. Saade, F. Pétrot, A. Picco, J. Huloux, A. Goulahsen

Doc. Source: Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS'13)

Publisher : IEEE

Pages : 147-152

Doi : 10.1109/DDECS.2013.6549807

High Speed Serial Links (HSSL) are found in almost all today's System-on-Chip (SoC) connecting different components: the main chip and its I/Os, chip to chip (the main chip to a companion chip, memory sharing between two chips), etc... A variety of standards exist, each of which is used for a specific application, and many parameters affect their performance. In this paper we make a comparison of three high-speed protocols, the USB 3.0, PCI Express 2.0 (PCIe) and LLI 1.0. We analyze their different parameters, mainly the data exchange protocol, errors management, the Bit Error Rate (BER), data efficiency and the quality of service (QoS) for each of the protocols. We also show the relation between these parameters and how improving one parameter could result in a degradation of another, and based on this analysis, we finish by concluding the reason why USB is used for I/Os, PCIe is used for data hungry devices and LLI for memory sharing.