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Fault-tolerant adaptive routing under static and run-time, permanent and transient failures for many-core systems-on-chip

Auteur(s) : Yi Gang, M. Dimopoulos, M. Benabdenbi, L. Anghel, N.-E. Zergainoh, M. Nicolaidis

Doc. Source: IEEE International On-Line Testing symposium (IOLTS'13)

Publisher : IEEE

Pages : 7 - 12

Doi : 10.1109/IOLTS.2013.6604043

A fault tolerant routing algorithm for 2D Mesh Networks-on-Chip is presented in this work. It combines an adaptive routing algorithm with neighbor fault-awareness and a new traffic-balancing metric. To be able to cope with runtime failures that result in message corruption, the routing algorithm is enhanced with packet retransmission and a new packet recovery scheme. Simulation results, under various case studies, with different permanent, transient and intermittent link faults, and under different failure rates demonstrate the scalability and efficiency of the proposed algorithm to tolerate multiple failures likely encountered in deep submicron technologies.