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Evaluating a low cost robustness improvement in SRAM-based FPGAs

Auteur(s) : M. Ben Jrad, R. Leveugle

Doc. Source: IEEE International On-Line Testing symposium (IOLTS'13)

Publisher : IEEE

Pages : 173-174

Doi : 10.1109/IOLTS.2013.6604072

Soft errors in the configuration memory of SRAM-based FPGAs cause significant application disturbances. We demonstrate on Xilinx and Altera FPGAs the feasibility of a very low cost and automated mitigation approach and we evaluate its efficiency.