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Handling dynamic frequency changes in statically scheduled cycle-accurate simulation

Auteur(s) : M. Gligor, F. Pétrot

Doc. Source: 16th Asia and South Pacific Design Automation Conference (ASP-DAC’11)

Publisher : IEEE

Pages : 407 - 412

Doi : 10.1109/ASPDAC.2011.5722224

Although high level simulation models are being increasingly used for digital electronic system validation, cycle accuracy is still required in some cases, such as hardware protocol validation or accurate power/energy estimation. Cycle-accurate simulation is however slow and acceleration approaches make the assumption of a single constant clock, which is not true anymore with the generalization of dynamic voltage and frequency scaling techniques. Fast cycle-accurate simulators supporting several clocks whose frequencies can change at run time are thus needed. This paper presents two algorithms we designed for this purpose and details their properties and implementations.