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Annotation within dynamic binary translation for fast and accurate system simulation

Auteur(s) : F. Pétrot, N. Fournel, M. Gligor

Doc. Source: 10th International Forum on Embedded MPSoC and Multicore (MPSoc'10)

This talk covers the basis of dynamic binary translation, a technique widely used in virtualization to perform high performance uniprocessor code interpretation. We present how to enhance this technique so that it can be used for accurate Multiprocessor SoC simulation, by introducing timing and/or power annotations at translation time. The focus here does not concern the value of the annotations, but how and when should these annotations be added. We show, by using abstract cache models, that the accuracy for simple risc processors is acceptable, and that the speed of simulation is still very good.