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Synthesis of asynchronous monitors for critical electronic systems

Auteur(s) : A. Porcher, K. Morin-Allory, L. Fesquet

Doc. Source: IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS’10)

Publisher : IEEE

Pages : 329 - 334

Doi : 10.1109/DDECS.2010.5491756

Monitors are small IPs that check critical systems, such as radio-altimeters that on-line control the landing phase in modern planes. It is essential to get correct information and avoid erroneous messages from these monitors. Asynchronous monitors are very robust to the environment variations; they remain functional in a wide range of power supplies or temperatures, and can reliably monitor synchronous circuits in a harsh environment. This paper discusses how asynchronous monitors can be modeled and generated from Property Specification Language (PSL). These monitors have been implemented and validated on a FPGA board and a CMOS 65 nm technology.