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Finite state machines: composition, verification, minimization: a case study

Auteur(s) : P. Amblard, F. Lagnier, M. Levy

Doc. Source: 10th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES'03)

Publisher : Tech. Univ. Lodz, Lodz, Poland

Pages : 214-219

A deep understanding of circuit behaviour is a prerequisite for any verification process (simulation, formal verification, test generation). We propose to use a tool which gives complete and optimized representations of sequential circuits allowing the designer to understand the accurate behaviour of the circuit. A detailed example is introduced to help reader's understanding. For obvious reasons, we choose a small size circuit. The example comes from our experience in computer architecture and digital design education.