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Robustness evaluation and improvements under laser-based fault attacks of an AES crypto-processor implemented on a SRAM-based FPGA

Auteur(s) : G. Canivet, P. Maistri, R. Leveugle, F. Valette, J. Clédière, M. Renaudin

Doc. Source: IEEE European Test Symposium (ETS'10)

Publisher : IEEE

Pages : 251

Doi : 10.1109/ETSYM.2010.5512740

Programmable devices like SRAM-based FPGAs, thanks to their low cost and high flexibility, are increasingly used for security applications; the mam drawback is their configuration memory, sensitive to perturbations. Symmetric cryptosystems are highly vulnerable to fault injections [1], but very few papers have reported laser-based fault attacks onto a secure implementation on a SRAM-based FPGA.