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Networks-In-Package: Performances management and design methodology

Auteur(s) : A. Kouadri Mostéfaoui, B. Senouci, F. Pétrot

Doc. Source: IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT’08)

Publisher : IEEE

Pages : 140-143

Doi : 10.1109/VDAT.2008.4542432

Nowadays large scale MPSoC designs embedding multiple processors, memories and specialized IPs require high integration densities which can not be met at an acceptable cost within the standard single-chip technology. The systems-in-package (SiP) approach has been proposed then as an alternative which enables such integration requirements. Even though analysis of systems-in-package design techniques shows large similarities with standard techniques for multi-chip-modules (MCM), there is a huge methodological lack for communication-centric MPSoCs. In this paper we motivate the need for new design methodologies which addresses the various problems of the emerging NiP (networks-in- package) paradigm with a special focus on performances considerations. We also propose a complete NoC architecture (MS-NoC) and a design flow aimed at helping designers to build NiP architectures.