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Mixed hardware software multilevel modeling and simulation for multithreaded heterogeneous MPSoC

Auteur(s) : K. Popovici, X. Guérin, L. Brisolara, A. A. Jerraya

Doc. Source: International Symposium on VLSI Design, Automation and Test (VLSI-DAT’07)

Publisher : IEEE

Pages : 79-82

In this paper, we introduce a Mixed Hardware – Software Architecture Model to abstract hardware-software interfaces of multithreaded heterogeneous multiprocessor architecture with specific hardware I/O. We use Simulink environment as modeling language to capture this representation. We generate two intermediate simulation models called Virtual Architecture and Transaction Accurate to validate the software during the different design steps. The software refinement is performed by automatic software code generation for parallel application from Simulink model, and automatic low level software customization for specific architecture. Through experiments we show the efficiency of the proposed design flow that decreases design time without affecting design quality.