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Adrian Evans , Cisco System

Theme: Managing Soft Error Effects in Core Routers
Date: Thursday, October 27, 2011, 2:30 pm - TIMA, Salle 312, 3éme étage

Biography

Adrian Evans is a Technical Leader at Cisco Systems and has 15 years of industrial experience in the design and verification of large digital ASICs for telecom and networking applications. He has a keen interest in system reliability and specifically the effects of soft-errors on network reliability. He holds an engineering degree from the University of Waterloo, Canada and a D.E.A. from Université de Paris VI. He is currently on a sabbatical year at TIMA researching new approaches to mitigate the effects of flip-flop soft errors (SEUs) in collaboration with Dr. Michael Nicolaidis.

Abstract

In this seminar, we will start by presenting a system level reliability model for core networking equipment. We will then show how this model imposes ASIC level reliability targets and how flip-flop soft-errors (SEUs) are making it increasingly challenging to achieve these targets. The discussion will bring to light the scale and complexity of an industrial SoC which can have over 10M flip-flops. We will discuss how SEU masking effects (temporal, logical and functional) can be characterized and the effects mapped back to a system level model. We will then finish by discussing some of the research directions for better characterizing the functional effects of SEUs and some of the practical mitigation techniques.