Employment at TIMA

Internship proposals


Development of a Hardware Environment for Side Channel Analysis

Host: TIMA Laboratory - AMfoRS team - 46 avenue Félix Viallet - 38031 GRENOBLE Cedex

Start Date: 01/02/2020

Duration: 5 months

Profile: The main objective of this internship is to implement embedded designs of common encryption algorithms in order to perform these physical attacks. The candidate will design modular architectures that will be implemented on several reconfigurable platforms, possibly dedicated to side channel attacks, to allow a thorough evaluation of the robustness of these solutions against power or EM analysis. The cryptographic systems may be protected by dedicated countermeasures against physical attacks, the candidate will be charged to implement them correctly in hardware or software. Finally, the candidate will also be charged with the task of setting up the experimental platforms, in order to facilitate the experimental campaigns.

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Contact person: Paolo MAISTRI (paolo.maistri@univ-grenoble-alpes.fr)

Remuneration: 500 / 560 euros net per month

Level: Master 2/ Engineer

 

 

Development of a Software Environment for Side Channel Analysis

Host: TIMA Laboratory - AMfoRS team - 46 avenue Félix Viallet - 38031 GRENOBLE Cedex

Start Date: 01/02/2020

Duration: 5 months

Profile: The main objective of this internship is to implement algorithms performing these physical attacks. The candidate will design an extensible software environment where differential, correlation, or more advanced attacks can be easily executed. Great flexibility of the developed platform will be mandatory, in order to adapt the environment to different cryptosystems vulnerable to power, EM, and possibly fault attacks.

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Contact person: Paolo MAISTRI (paolo.maistri@univ-grenoble-alpes.fr)

Poursuite en thèse possible

Remuneration: 500 / 560 euros net per month

Level: Master 2/ Engineer

 

 

SRAM-Based PUF with STM Controllers

Host: TIMA Laboratory - AMfoRS team - 46 avenue Félix Viallet - 38031 GRENOBLE Cedex

Start Date: 15/02/2020

Duration: 6 months

Profile: A Physically Unclonable Function (PUF) exploits intrinsic manufacturing variability introduced in a device during the fabrication process to generate a signature, unique to each single device. In SRAM-based PUFs, the signature is generating by reading the content of the memory after the power-up.
In this internship we want to set-up a hardware platform based on multiple STM32 microcontrollers, able to read-out the content of the SRAM embedded in all the controllers, and automatically store the signatures in an external database. The platform will have to automatically repeat the measurements at different time instants (i.e., the platform must be able to switch on and off the microcontrollers).
The goal of the internship is to store enough data from many devices in order to: (i) evaluate the quality of the PUF that ca be obtained from the STM microcontrollers; (ii) to evaluate their reliability (i.e., how often the signatures change in time).
Prerequisites: STM32/ARM programming for writing a small routine able to read the content of the memory and transfer the data through an identified channel (e.g., USB, ethernet, serial), C programming (for writing the “server” application able to receive the data from the identified channel, to store all data, to drive the power supply of the boards).

Applications: Please send your resume, application letter with two recommendations (including education director), first year master’s degree grades (mandatory) and second year grades (if possible) to cyberalps-contact@univ-grenoble-alpes.fr.

For more information on the internship, please contact [giorgio.di-natale@univ-grenoble-alpes.fr]

Contact person: Giorgio DI NATALE (giorgio.di-natale@univ-grenoble-alpes.fr) / Elena Ioana VATAJELU (ioana.vatajelu@univ-grenoble-alpes.fr)

Remuneration: 512 € / month

Level: Master 2

 

 

ACDC: Approximate Computing and Distributed Computing in System on Chips: modelling and simulation

Host: TIMA Laboratory - AMfoRS team - 46 avenue Félix Viallet - 38031 GRENOBLE Cedex

Start Date: january-february 2020

Duration: 5 months

Profile: Data approximation modelling within multi-thread application models. Approximate Computing for energy savings for multi-core and multi-thread applications.

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Contact person: Mounir BENABDENBI (mounir.benabdenbi@univ-grenoble-alpes.fr)

Remuneration: 550 euros net per month (regular internship 'gratification')

Level: Master 2

 

 

Behavioral-Level Fault Modelling for Spiking Neural Networks

Host: TIMA Laboratory - AMfoRS team - 46 avenue Félix Viallet - 38031 GRENOBLE Cedex

Start Date: February 3rd, 2020

Duration: 6 months

Profile: The main objective of this internship is to analyze the possible SNN faults and provide a dictionary of fault models and a classification of faults by their severity.

The computing performance needed by emerging electronic applications (such as Internet-of-Things and Big Data analytics) is posing a serious challenge to current computer architectures and technologies, which are required to provide increasing computing power while withstanding severe constraints on size, energy consumption and reliability. Conventional Von-Neumann architectures and memories are not likely to fulfil all the needs of modern applications, due to inherent technological and conceptual limitations. Hence, in order to be at the forefront of the electronic industry in terms of design and manufacturing capabilities, it is essential to focus research and innovation efforts on the development of novel non-Von Neumann architectures enabled by emerging technology devices. In this context, the neuromorphic computing paradigm has a huge potential when it makes use of emerging NV technologies (STT-MRAM, memristors), however, reliable and testable HW designs enabling the neu romorphic computing are still missing.
This internship is concerned with the following research areas: (i) emerging memory technologies (memristors and/or spintronic devices) used in a non-Von Neumann context, (ii) hardware dependability (robustness, reliability and test) and design-for-dependability, (iii) hardware implementations of bio-inspired neural networks (Spiking Neural Networks).

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Contact person: Elena Ioana VATAJELU (ioana.vatajelu@univ-grenoble-alpes.fr)

Remuneration: 512 € / month

Level: Master 2 / Dernière année d'école d'ingénieur

 

 

Design and Evaluation of a Hardware-implemented Spiking Neural Network (SNN) with Spike-Timing-Dependent-Plasticity (STDP) learning

Host: TIMA Laboratory - AMfoRS team - 46 avenue Félix Viallet - 38031 GRENOBLE Cedex

Start Date: February 3rd, 2020

Duration: 6 months

Profile: The main objective of this internship is to design and evaluate a HW-implemented SNN using analog leaky-integrate and fire neurons and spintronic synapses.

Conventional Von-Neumann architectures and memories are not likely to fulfil all the needs of modern applications, due to inherent technological and conceptual limitations. Hence, in order to be at the forefront of the electronic industry in terms of design and manufacturing capabilities, it is essential to focus research and innovation efforts on the development of novel non-Von Neumann architectures enabled by emerging technology devices. In this context, the neuromorphic computing paradigm has a huge potential when it makes use of spintronic NV technologies.
This internship is concerned with the following research areas: (i) emerging memory technologies (memristors and/or spintronic devices) used in a non-Von Neumann context, (ii) hardware implementations of bio-inspired neural networks (Spiking Neural Networks).

See complete information

Contact person: Elena Ioana VATAJELU (ioana.vatajelu@univ-grenoble-alpes.fr)

Remuneration: 512 € / month

Level: Master 2 / Dernière année d'école d'ingénieur