TIMA laboratory
News
Projet PANTACOUR financé par l'INS2I
, FRANCE
Le projet PANTACOUR (Physical Attacks: New Targets and Countermeasures), porté par Brice COLOMBIER, a été accepté dans le cadre de l'appel à projet 2021 de l'INS2I
See complete information
Projet FISSA5 financé par l'INS2I
, FRANCE
Le projet FISSA5 (Fault Injection platform for Safety and Security Analyses on RISC-V), porté par Paolo MAISTRI, a été accepté dans le cadre de l'appel à projet 2021 de l'INS2I
See complete information
Le prochain Conseil Scientifique aura lieu le
08/03/2021 - De 14 h 30 à 17 h 00, Visioconférence interne, FRANCE
Le prochain Conseil de Laboratoire aura lieu le
04/03/2021 - De 14 h 30 à 17 h 00, Visioconférence interne, FRANCE
Conferences
24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems
DDECS
Venue: Vienna (virtual event), AUSTRIA
Date: April 7-9, 2021
technical program committee : LEVEUGLE R., MAISTRI P., PIERRE L., PORTOLAN M., VATAJELU E.I.
39th VLSI Test Symposium (VTS 2020)
VTS
Venue: Virtual event, FRANCE
Date: April 25-28, 2021
steering committee member : NICOLAIDIS M.
technical program committee : BARRAGAN M., DI NATALE Giorgio, MIR S.
PhD thesis defenses
« Secured access to IEEE 1687 test resources and lightweight crypto-processors in the IoT context ».
Candidate: V. Reynaud
Advisor: R. Leveugle
PhD: These de Doctorat, Université Grenoble Alpes
Speciality: Micro et Nano Electronique
Defense: 09/03/2021 - Heure à définir, TIMA Laboratory - Room T312
Abstract
This work is in the context of applying the IEEE 1687 standard in complex circuits with security constraints. The main objectives are: - to secure the (hierarchical) access to embedded monitoring instruments, so that only a given set of authorized users can access each embedded instrument. This implies a flexible authentication protocol that may be more or less complex depending on the criticality of each embedded instrument. An advanced authentication protocol aiming at robustness and light weight will be proposed, compliant with the definitive IEEE 1687 standard and supporting multiple access rights and/or policies. Security enhancement of test channels in unsecured environments must be achieved with no impact on test coverage and very small impact on test time. - to implement a flexible set of optimized hardware security protection elements, including lightweight crypto-processors themselves protected against hardware attacks (fault attacks and side-channel attacks) and verified for self-testability in order to avoid additional backdoors. Efficient implementations will be based mainly on recent open cryptographic algorithms. Several trade-offs between hardware implementation costs, computation time for authentication and level of security will be analyzed, on the basis of several encryption algorithms. Validation will be carried out by simulation and/or emulation. - to ensure scalability as another criterion, in order to propose a solution that can easily be adapted to the many types of IoT objects, with very different constraints and objectives. Another aspect is the limited re-use of a secret access key when many similar objects are distributed, in order to reduce the risk in case a key is broken by a hacker. Also, dynamic communication between a test interface and the object will be enforced, on the basis of the MAST technology developed in the team and currently in industrialization phase.
Awards
Best reading paper - Transactions of Microwave Theory and Techniques (December 2020 issue)
Award: Best reading paper - Transactions of Microwave Theory and Techniques
Date: December 2020 issue
Title: Design of mm-Wave Slow-wave Coupled Coplanar Waveguides (TMTT-2020-04-0426)
Authors:
- Marc MARGALEF-ROVIRA, IEEE member (TIMA - RMS team)
- Jose LUGO-ALVAREZ (CEA LETI)
- Alfredo BAUTISTA (Advanced Silicon)
- Loic VINCENT (Grenoble INP)
- Sylvie LEPILLIET (IEMN)
- Abdelhalim A. SAADI (RFIC-Lab)
- Florence PODEVIN, IEEE member (RFIC-Lab)
- Manuel J. BARRAGAN, IEEE member (TIMA - RMS team)
- Emmanuel PISTONO (RFIC-Lab)
- Sylvain BOURDEL (RFIC-Lab)
- Christophe GAQUIERE (IEMN)
- Philippe FERRARI, IEEE Senior Member (RFIC-Lab)
Winner of PhD Forum at VLSI-SoC'2019 (Cuzco, PERU)
Award: Winner of PhD Forum at VLSI-SoC'2019 (27th IFIP/IEEE International Conference on Very Large Scale Integration)
Date: October 6-9, 2019
Place: Cuzco (PERU)
Title: A Digital Event-Based Strategy for ASK demodulation
Authors:
- Rodrigo IGA JADUE (TIMA - CDSI team)
- Sylvain ENGELS (TIMA - CDSI team)
- Laurent FESQUET (TIMA - CDSI team)
Best Paper Award at DDECS'2019 (Cluj Napoca, ROMANIA)
Award: Best Paper Award at DDECS'2019 (22nd International Symposium on Design and Diagnostics of Electronics Circuits and Systems)
Date : April 24-26, 2019
Place : Cluj Napoca (ROMANIA)
Title : "Encryption-Based Secure JTAG"
Authors :
- Emanuele VALEA (LIRMM, Montpellier)
- Mathieu DA SILVA (LIRMM, Montpellier)
- Marie-Lise FLOTTES (LIRMM, Montpellier)
- Giorgio DI NATALE (TIMA, AMfoRS team, Grenoble)
- Bruno ROUZEYRE (LIRMM, Montpellier)
