TIMA laboratory



10th IEEE Latin American Symposium on Circuits and Systems

Venue: Armenia, Quindío,
Date: February 24-27, 2019

technical program committee : MIR S., POSSAMAI BASTOS R.

Summary: LASCAS is the Flagship Conference of IEEE's Circuits and Systems Society in Latin America. Since its inception and first edition in 2010, LASCAS aims at presenting a high-quality forum for researchers and graduate students to present the advances of their work, admits an international audience with experts from all over the world. This 10th edition will take place in Armenia, Quindío, Colombia.

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20th IEEE Latin American Test Symposium

Venue: Santiago,
Date: March 11-13, 2019

co-general chair : VELAZCO R.
finance chair : FOURNERET-ITIÉ A.-L.
technical program committee : ANGHEL L., DI NATALE Giorgio, LEVEUGLE R., MIR S., POSSAMAI BASTOS R., SIMEU E.

Summary: The IEEE Latin-American Test Symposium (LATS, previously Latin-American Test Workshop - LATW) is a recognized forum for test and fault tolerance professionals and technologists from all over the world, in particular from Latin America, to present and discuss various aspects of system, board, and component testing and fault-tolerance with design, manufacturing and eld considerations in mind.

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Design, Automation & Test in Europe

Venue: Firenze,
Date: March 25-29, 2019

interactive presentations chair : PETROT F.
technical program committee : BARRAGAN M., MORIN-ALLORY K., VATAJELU E.I.
University Booth Co-Chair : VATAJELU E.I.

Summary: DATE is the top scientific event in Design, Automation, and Test of microelectronics and embedded systems for the academic and industrial research communities worldwide. It provides a unique networking opportunity, bringing together designers and design automation users, researchers and vendors, as well as specialists in hardware and software design, test and manufacturing of electronic circuits and systems.

In 2019, the conference will take place for the first time in Florence, Italy. Florence is the capital of Tuscany Region, centrally located and very easy to reach via an international airport hub. Art, culture, modernity and vibrancy: Florence is much more than the cradle of Renaissance. Vaunting an unparalleled past of incredible accomplishments, Florence is a contemporary city that offers year-round entertainment. Striking architecture and monuments, museums of masterpieces, as well as fashion, theatres, gardens, modern art exhibitions, excellent places to eat and drink, and an international flair that has always set this city apart. It is time to fall in love with Florence. It is situated on the plain of the Arno River between the hills that made this region famous, surrounded by towns, villages and enchanting landscapes. Due to its history, today Florence can offer a lot of astonishing venues like the Palazzo Pitti or Palazzo Vecchio, the Town Hall of Florence, many churches like the Basilica di Santa Croce, the Basilica di Santa Maria Novella and also some open-air museums such as Giardino delle Rose and Giardino di Boboli. Florence is also a modern destination that offers many opportunities for events and activities for guests. In 2019, all over Italy but particularly Florence and the nearby hometown Vinci will be celebrating the 500th anniversary of the death of the genius Leonardo da Vinci.

The five-day event covers the design process, test, and automation tools for electronics, ranging from integrated circuits to distributed embedded systems. The conference scope includes both hardware and embedded software design issues. It also includes the elaboration of design requirements and new architectures for challenging application fields such as internet of things, multimedia, healthcare, smart energy, and automotive systems.

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14th International Conference on Design & Technology of Integrated Systems in Nanoscale Era

Venue: Mykonos,
Date: April 16-18, 2019

program chair : VATAJELU E.I.

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PhD thesis defenses

« Currently there is no defense planned »


IFIP WG 10.5 Meritorious Service Award at VLSI-SoC'2018 (Verona, ITALY)

Award: The IFIP WG 10.5 Meritorious Service Award has been given to Mrs Dominique BORRIONE "for continued services to IFIP ans the Working Group on Design and Engineering of Electronic Systems"
She was awarded during VLSI-SoC'2018 (26th IFIP/IEEE International Conference on Very Large Scale Integration)
Date: October 8-10, 2018
Place: Verona (ITALY)

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Best Paper Award at ETS'2018 (Bremen, GERMANY)

Award: Best Paper Award at ETS'2018 (23rd IEEE European Test Symposium)
Date: May 28 - June 01, 2018
Place: Bremen (GERMANY)
Title: "Assisted test design for non-intrusive machine learning indirect test of millimeter-wave circuits"
Authors: Authors: Florent CILICI (TIMA-RMS), Manuel BARRAGAN (TIMA-RMS), Salvador MIR (TIMA-RMS), Estelle LAUGA-LARROZE (RFIC-Lab), Sylvain BOURDEL (RFIC-Lab)


Best Paper Award at SIGNAL'2018 (Nice, FRANCE)

Award: Best Paper Award at SIGNAL'2018 (3rd International Conference on Advances in Signal, Image and Video)
Date: May 20 - 24, 2018
Place: Nice (FRANCE)
Title: "Shaping Electromagnetic Emissions of Event-Driven Circuits Thanks to Genetic Algorithms"

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Best Paper Award at ASYNC'2018 (Vienna, AUSTRIA)

Award: Best Paper Award at ASYNC'2018 (24th IEEE International Symposium on Asynchronous Circuits and Systems)
Date: May 13-16, 2018
Place: Vienna (AUSTRIA)
Title: "Static Timing Analysis of Asynchronous Bundled-data Circuits"
Authors: Grégoire GIMENEZ (TIMA-CDSI), Abdelkarim CHERKAOUI (TIMA-CDSI), Guillaume COGNIARD, Laurent FESQUET (TIMA-CDSI)


Best Poster at JNRDM'2017 (Strasbourg, FRANCE)

Award: Best Poster at JNRDM'2017 (Journées Nationales du Réseau Doctoral en Micro-nanoélectronique 2017)
Date: November 6-8, 2017
Place: Strasbourg (FRANCE)
Title: "Conception en vue du test d’un amplificateur de puissance à 60 GHz"
Authors: Florent CILICI (TIMA-RMS), Manuel BARRAGAN (TIMA-RMS), Estelle LAUGA-LARROZE, Sylvain BOURDEL, Salvador MIR (TIMA-RMS)

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Best Paper Award at WCO'2016

Award: Title: "Formulation and practical solution for the optimization of memory accesses in embedded vision systems" at 9th International Workshop on Computational Optimization (WCO'2016 - Gdansk, POLAND - September 11-14, 2016)
Authors: K. Hadj Salem, Y. Kieffer, S. Mancini

September 11-14, 2016


Raoul VELAZCO senior member IEEE

Award: Raoul VELAZCO senior member IEEE
IEEE Senior member grade is offered in recognition of professional standing and significant performance.


Runner-up Best Paper Award in SBCCI'2016 (Belo Horizonte, BRAZIL)

Award: Runner-up Best Paper Award in lnternational Symposium on Integrated Circuits and Systems Design (SBCCI) 2016

Project: New Asynchronous Protocols for Enhancing Area and Throughput in Bundled-Data Pipelines


Abstract: This paper presents two new area-reduced controllers for bundled-data asynchronous pipelines in which the stages have long critical paths. The proposed protocols allow to reduce the number of required delay elements by using the falling edge of the asynchronous request to indicate data validity. For critical path lengths of 25 gates, the first presented scheme decreases the controller area by 48% and slightly increases the maximum throughput (2%) in comparison to a standard micropipeline implementation. The other more-concurrent scheme proposition leads to a 25% area reduction and a 40% improvement of the maximum pipeline throughput.

August 29 - September 3, 2016


Best Presentation and Paper Award at JNRSE'2017 (Lyon, FRANCE)

Award: Best Presentation and Paper Award at JNRSE 2017 (7èmes Journées Nationales sur la Récupération et le Stockage d'Energie)

Title: "Modeling and operating temperature tuning of a thermally activated piezoelectric generator"

Authors: Adrian RENDON-HERNANDEZ and Skandar BASROUR

Abstract: This paper deals with the finite element model of a thermally activated piezoelectric generator. Furthermore, it presents an experimentally validated temperature tuning technique based on the gap distance of the triggering system. The working principle of proposed generator relies on the multi step thermal-to-mechanical-to-electrical energy conversion, overcoming inconveniences related to fast temporal temperatura variations and large temperature differences for efficient operating of classical direct thermal energy conversion. Performance optimization can be done in the form of temperature span tuning by changing the gap distance. By increasing this parameter, it is possible to maximize the Energy up to 10 times. Experimental data suggests that output energy up to 67 μW is possible when optimal gap distance is set. This corresponds to a power density of 103 μWcm-3

May 9-10, 2017



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